#16
Det kommer også an på, hvor meget v de får i biosen på dit GFX,det har også noget at sige.
+hvordan de har sat cas på ram
General Description
FOR 2M x 32Bit x 4 Bank GDDR3 SDRAM
The K4J55323QG is 268,435,456 bits of hyper synchronous data rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits, fabricated with SAMSUNG's high performance CMOS technology.
Synchronous features with Data Strobe allow extremely high performance up to 6.4GB/s/chip.
I/O transactions are possible on both edges of the clock cycle.
Range of operating frequencies, and programmable latencies allow the device to be useful for a variety of high performance memory system applications.
Features
1.8V± 0.1V power supply for device operation
1.8V± 0.1V power supply for I/O interface
On-Die Termination (ODT)
Output Driver Strength adjustment by EMRS
Calibrated output drive
1.8V Pseudo Open drain compatible inputs/outputs
4 internal banks for concurrent operation
Differential clock inputs (CK and /CK)
Commands entered on each positive CK edge
CAS latency : 4, 5, 6, 7, 8, 9, 10, 11 (clock)
Additive latency (AL) : 0 and 1 (clock)
Programmable Burst length : 4 and 8
Programmable Write latency : 1, 2, 3, 4, 5, 6 and 7 (clock)
Single ended READ strobe (RDQS) per byte
Single ended WRITE strobe (WDQS) per byte
RDQS edge-aligned with data for READs
WDQS center-aligned with data for WRITEs
Data Mask(DM) for masking WRITE data
Auto & Self refresh modes
Auto Precharge option
32ms, auto refresh (4K cycle)
136 Ball FBGA
Maximum clock frequency up to 800MHz
Maximum data rate up to 1.6Gbps/pin
DLL for outputs
Boundary scan function with SEN pin
Mirror function with MF pin