ATI's ring bus is a pair of 256-bit memory rings and four ring stops. Data is placed on the bus and it will travel to each ring stop until the destination is reached where it is then claimed by the correct node. The ATI memory rings can send data in opposite directions to minimize the time spent on the ring. In other GPU architectures, memory requests would get passed back to a memory controller first before being sent to the appropriate node. The ring bus architecture harkens back to the 70's token ring network set ups where data also travels along a ring until it is picked up. ATI claims that the ring bus will also allow them to support faster types of memory as it becomes available.