Et smugkig på fremtidens ramteknologi
Diverse d. 30. oktober. 2009, skrevet af TheGreenFoX 16 Kommentarer. Vist: 1853 gange.
#1
hehe 10 år er lang tid, men interessant er de.t....
40nm sker i 2010 🙂
Så krydser vi alle lige fingre for micron fortsætter deres D9 serie fremfor flashram... 😎
40nm sker i 2010 🙂
Så krydser vi alle lige fingre for micron fortsætter deres D9 serie fremfor flashram... 😎
#2
hmm, ved godt det sikkert bare er i mit naive hovede den er gal.. men om 10 år.. er der mon ikke kommet noget til den tid der er kraftigere end det de disker op med??
udviklingen render jo rimelig stærkt
udviklingen render jo rimelig stærkt
#3
Til juletid, sådan nogle der udvikler den slags skal slet ikke holde jul, de skal bare få fingeren ud og få et produktionsapparat op og køre i en vis fart.......OG DET KAN KUN GÅ FORLANGSOMT!
😀
😀
#4
Tidshorisonten har nok noget at gøre med at de ikke "må" frigive sådan noget endnu, så krakker markeder for ram og anden hukommelse fuldstændig.
F.eks. da vi fik Blu-ray var der jo allerede udviklet medier der kan indeholde 10 gange så meget som en blu-ray.
F.eks. da vi fik Blu-ray var der jo allerede udviklet medier der kan indeholde 10 gange så meget som en blu-ray.
#5
#2
DDR stammer tilbage fra 60erne, så 10 år er ikke så meget for ram udviklerne
DDR stammer tilbage fra 60erne, så 10 år er ikke så meget for ram udviklerne
#6
#4, #5 Ahhhr, I taler som jeg har forstand 🤣
Sig mig en gang da er der ikke en udvikling inden for udvikling eller er den også gået i stå sammen med flowerpower'en i 06'ern 😲
Sig mig en gang da er der ikke en udvikling inden for udvikling eller er den også gået i stå sammen med flowerpower'en i 06'ern 😲
#7
#6
Hvad snakker du om?
Alt hvad jeg skriver passer skam.
Hvad snakker du om?
Alt hvad jeg skriver passer skam.
#8
Ifølge Wikipedia;
DDR Ram
"Beginning in 1996 and concluding in June 2000, JEDEC developed the DDR (Double Data Rate) SDRAM specification (JESD79)."[1] JEDEC has set standards for data rates of DDR SDRAM, divided into two parts. The first specification is for memory chips, and the second is for memory modules. As DDR SDRAM is superseded by the newer DDR2 SDRAM, the older DDR version is sometimes referred to as DDR1 SDRAM.
SDRAM history
Although the concept of synchronous DRAM has been known since at least the 1970s and was used with early Intel processors, it was only in 1993 that SDRAM began its path to universal acceptance in the electronics industry. In 1993, Samsung introduced its KM48SL2000 synchronous DRAM, and by 2000, SDRAM had replaced virtually all other types of DRAM in modern computers, because of its greater performance.
DRAM på den anden hånd, hvis det var det du skulle mene #5.
The cryptanalytic machine code-named "Aquarius" used at Bletchley Park during WW II incorporated a hard-wired dynamic memory. Paper tape was read and the characters on it "were remembered in a dynamic store. ... The store used a large bank of capacitors, which were either charged or not, a charged capacitor representing cross (1) and an uncharged capacitor dot (0). Since the charge gradually leaked away, a periodic pulse was applied to top up those which were still charged (hence the term 'dynamic')."[1].
In 1964, Arnold Farber and Eugene Schlig working for IBM created a memory cell that was hard wired; using a transistor gate and tunnel diode latch, they later replaced the latch with two transistors and two resistors, which became known as the Farber-Schlig cell. In 1965, Benjamin Agusta and his team working for IBM managed to create a 16-bit silicon memory chip based on the Farber-Schlig cell which consisted of 80 transistors, 64 resistors and 4 diodes. In 1966 DRAM was invented by Dr. Robert Dennard at the IBM Thomas J. Watson Research Center and he was awarded U.S. patent number 3,387,286 in 1968. Capacitors had been used for earlier memory schemes such as the drum of the Atanasoff-Berry Computer, the Williams tube and the Selectron tube.
The Toshiba "Toscal" BC-1411 electronic calculator, which went into production in November 1965, uses a form of dynamic RAM built from discrete components.[2]
In 1969 Honeywell asked Intel to make a DRAM using a 3-transistor cell that they had developed. This became the Intel 1102 (1024x1) in early 1970. However the 1102 had many problems, prompting Intel to begin work on their own improved design (in secrecy to avoid conflict with Honeywell). This became the first commercially-available DRAM memory, the Intel 1103 (1024x1) in October 1970 (despite initial problems with low yield until the 5th revision of the masks).
The first DRAM with multiplexed row and column address lines was the Mostek MK4096 (4096x1) designed by Robert Proebsting and introduced in 1973. This addressing scheme, a radical advance, allowed it to fit into packages with fewer pins, a cost advantage that would grow with every jump in memory size. The MK4096 also proved to be very robust design in customer applications. At the 16K density the cost advantage increased, and the Mostek MK4116 16K DRAM achieved greater than 75% worldwide DRAM market share. However, as density increased to 64K Mostek was overtaken by Japanese DRAM manufacturers selling higher quality DRAMs using the same multiplexing scheme at below-cost prices.
Svaret blev redigeret 3 gange, sidst af DjeavleN d. 31-10-2009 00:44:43.
DDR Ram
"Beginning in 1996 and concluding in June 2000, JEDEC developed the DDR (Double Data Rate) SDRAM specification (JESD79)."[1] JEDEC has set standards for data rates of DDR SDRAM, divided into two parts. The first specification is for memory chips, and the second is for memory modules. As DDR SDRAM is superseded by the newer DDR2 SDRAM, the older DDR version is sometimes referred to as DDR1 SDRAM.
SDRAM history
Although the concept of synchronous DRAM has been known since at least the 1970s and was used with early Intel processors, it was only in 1993 that SDRAM began its path to universal acceptance in the electronics industry. In 1993, Samsung introduced its KM48SL2000 synchronous DRAM, and by 2000, SDRAM had replaced virtually all other types of DRAM in modern computers, because of its greater performance.
DRAM på den anden hånd, hvis det var det du skulle mene #5.
The cryptanalytic machine code-named "Aquarius" used at Bletchley Park during WW II incorporated a hard-wired dynamic memory. Paper tape was read and the characters on it "were remembered in a dynamic store. ... The store used a large bank of capacitors, which were either charged or not, a charged capacitor representing cross (1) and an uncharged capacitor dot (0). Since the charge gradually leaked away, a periodic pulse was applied to top up those which were still charged (hence the term 'dynamic')."[1].
In 1964, Arnold Farber and Eugene Schlig working for IBM created a memory cell that was hard wired; using a transistor gate and tunnel diode latch, they later replaced the latch with two transistors and two resistors, which became known as the Farber-Schlig cell. In 1965, Benjamin Agusta and his team working for IBM managed to create a 16-bit silicon memory chip based on the Farber-Schlig cell which consisted of 80 transistors, 64 resistors and 4 diodes. In 1966 DRAM was invented by Dr. Robert Dennard at the IBM Thomas J. Watson Research Center and he was awarded U.S. patent number 3,387,286 in 1968. Capacitors had been used for earlier memory schemes such as the drum of the Atanasoff-Berry Computer, the Williams tube and the Selectron tube.
The Toshiba "Toscal" BC-1411 electronic calculator, which went into production in November 1965, uses a form of dynamic RAM built from discrete components.[2]
In 1969 Honeywell asked Intel to make a DRAM using a 3-transistor cell that they had developed. This became the Intel 1102 (1024x1) in early 1970. However the 1102 had many problems, prompting Intel to begin work on their own improved design (in secrecy to avoid conflict with Honeywell). This became the first commercially-available DRAM memory, the Intel 1103 (1024x1) in October 1970 (despite initial problems with low yield until the 5th revision of the masks).
The first DRAM with multiplexed row and column address lines was the Mostek MK4096 (4096x1) designed by Robert Proebsting and introduced in 1973. This addressing scheme, a radical advance, allowed it to fit into packages with fewer pins, a cost advantage that would grow with every jump in memory size. The MK4096 also proved to be very robust design in customer applications. At the 16K density the cost advantage increased, and the Mostek MK4116 16K DRAM achieved greater than 75% worldwide DRAM market share. However, as density increased to 64K Mostek was overtaken by Japanese DRAM manufacturers selling higher quality DRAMs using the same multiplexing scheme at below-cost prices.
Svaret blev redigeret 3 gange, sidst af DjeavleN d. 31-10-2009 00:44:43.
#9
jaja 10 år og så holder de lige tilbag med at lancer den til aller de gamle muligherd er maxet ud til bristepungtet for lige at klemme den siste $ ud af folket
#10
#7 du skal ikke være så nærtagende. 🤣
Fra min side var det ikke ment seriøst i #6, som det måske kom til at lyde som/læses som.
men hvis jeg er kommet til at træde på dine følelser, så undskylder jeg ydmygt og mange gange. :'-(
Ps.: selvfølgelig tror jeg 100% på alt hvad du siger. 😲 jo, den er god nok, jeg mener det, denne gang
hvor er resten af mig halve flaske whisssssky 😴
Svaret blev redigeret 1 gang, sidst af bornholm d. 31-10-2009 01:59:02.
Fra min side var det ikke ment seriøst i #6, som det måske kom til at lyde som/læses som.
men hvis jeg er kommet til at træde på dine følelser, så undskylder jeg ydmygt og mange gange. :'-(
Ps.: selvfølgelig tror jeg 100% på alt hvad du siger. 😲 jo, den er god nok, jeg mener det, denne gang
hvor er resten af mig halve flaske whisssssky 😴
Svaret blev redigeret 1 gang, sidst af bornholm d. 31-10-2009 01:59:02.
#11
Åhhr der var du, FUNDET! 😴 😴
#12
#8
Teknologien bag DDR ram stammer fra 60erne. Det viser bare hvor længe der gik inden der var et produkt klar
Teknologien bag DDR ram stammer fra 60erne. Det viser bare hvor længe der gik inden der var et produkt klar
greenfox hva snakker du om!?
så det jo det samme som at påstå alt ram teknologi stammer fra 60erne. Læs dog hvad #8 skriver ;). det var D ram altså DYNAMISK RAM. og ikke Double Data Rate ram. ! der kæmpe forskel i hvordan de 2 fungere :)
så det jo det samme som at påstå alt ram teknologi stammer fra 60erne. Læs dog hvad #8 skriver ;). det var D ram altså DYNAMISK RAM. og ikke Double Data Rate ram. ! der kæmpe forskel i hvordan de 2 fungere :)
#16
#1 Du vil nok også synes CMOx er spændende ift your POV